The STM32F103C8T6 is a Cortex-M3 microcontroller commonly considered for compact control and acquisition designs. Its practical limits include the exact C8 memory capacity, shared USB/CAN resources and what happens to application state during low-power operation. These limits should be resolved before choosing a board or adapting firmware from another STM32F1 variant.
Exact-device resources
| Item | STM32F103C8T6 |
|---|---|
| CPU | Cortex-M3, up to 72 MHz |
| Flash / SRAM | 64 KiB / 20 KiB |
| Package | 48-lead LQFP, 7 × 7 mm body |
| Digital I/O | Up to 37 GPIOs, reduced by the selected peripheral and clock functions |
| Main supply | 2.0–3.6 V; check operating conditions for each peripheral |
| Temperature suffix 6 | −40 to +85 °C ambient |
The exact ordering information is in ST DS5319: STM32F103x8/xB datasheet. Budget firmware for 64 KiB of Flash; reports of extra accessible space on particular hobby boards are not a specification for the C8 order code.
USB and CAN cannot run concurrently on this device
The STM32F103 USB and CAN peripherals share a dedicated 512-byte packet SRAM. ST explicitly identifies that they cannot operate at the same time; see ST AN4879: USB on STM32 products. Remapping CAN pins does not remove that internal resource conflict.
For a proposed USB-to-CAN bridge, resolve this restriction at architecture selection. If both links must remain active, evaluate a controller with independent resources or a separate interface device. If the application genuinely allows switching modes, specify how queued messages are drained and how peers reconnect. Treat that as a different requirement from concurrent bridging, and test it accordingly.
Stop and Standby have different recovery paths
Stop retains SRAM and register contents. Standby switches off the main internal power domain and loses SRAM and most register contents, with exceptions for the backup domain and Standby circuitry. The low-power section of ST DS5319: STM32F103x8/xB datasheet explains these boundaries.
Choose the mode from the state that must survive, not just the smallest current figure in a table. For Stop, plan clock restoration and the next scheduled acquisition. For Standby, plan a boot-like initialization path and decide which small amount of state must be preserved separately. Do not rely on a RAM queue still containing pending records after Standby.
A useful validation sequence is to place a recognizable pattern in a test buffer, enter the selected mode, trigger the intended wake source and log the reset/wake flags before application initialization overwrites them. Compare behavior with the documented retention boundary. Measure complete-board current under the same conditions, including regulators, LEDs and attached sensors; a bare-chip current figure does not include those loads.
A sample-buffer budget that fits the actual SRAM
Design example: four channels sampled at 2,000 samples per second, stored as two bytes each, require 4 × 2,000 × 2 × 0.1 = 1,600 bytes for 100 ms. Double buffering consumes 3,200 bytes, or 15.625% of 20 KiB. This is storage arithmetic, not a measurement of ADC accuracy or a guarantee that a particular analog source settles fast enough.
Reserve additional space for the stack, communication queues and application variables. Inspect the linker map, then measure stack usage under the longest interrupt nesting and error-recovery path. If the communication consumer stalls longer than the buffer duration, define whether records are dropped, sampling stops or storage is extended. Increasing the CPU clock does not by itself fix an undersized queue.
Pin assignment, boot and board selection
A development-board label is not a pinout authority. Use the exact package table to map the application, and account for debug access and oscillator pins. Count timer outputs and communication pins only after resolving alternate-function conflicts. Record the assigned pin, signal voltage and external connection in the schematic review.
Use ST AN2586: STM32F10xxx hardware development for supply, reset and boot hardware. Check the device-specific entry in ST AN2606: System memory boot mode before selecting a factory programming interface: the presence of a USB peripheral does not establish that a device has a USB DFU ROM loader. A third-party bootloader installed in Flash is a separate software component with its own memory and recovery requirements.
When to change the MCU
Start with the missing requirement: more program space, concurrent interfaces, lower measured system power or additional pins. Compare an exact replacement order code against that requirement, then review electrical limits, pin mapping, boot behavior and firmware dependencies. A part advertised as compatible by a board seller is not automatically interchangeable in a production design.
Keep the firmware build, linker settings and tested board revision together. That record makes a later sourcing change reviewable and prevents a memory-capacity assumption from silently moving between two similar-looking parts.
Ordering and documentation
For a quotation, provide the complete order code, quantity, delivery date and any lot or documentation requirements. WWDParts confirms commercial terms in the written quotation. Find STM32F103C8T6 in the catalog or prepare an RFQ.
Manufacturer references
- ST DS5319: STM32F103x8/xB datasheet
- ST AN4879: USB on STM32 products
- ST AN2586: STM32F10xxx hardware development
- ST AN2606: System memory boot mode
Technical content reviewed October 12, 2026 against the linked manufacturer documents. Calculations are design examples, not measured board results.